基本細(xì)節(jié):900A16-0001 I/O模塊可用于創(chuàng)建自定義 多種熱電偶類型

900A16-0001
以下I/O模塊可用于創(chuàng)建自定義
控制解決方案。
?16通道通用IO模塊銀河隔離輸入/輸出到機(jī)箱(p.29)
?8點通用模擬輸入模塊:電隔離點到機(jī)箱的輸入可以在模塊上混合，并且可能包括多種熱電偶類型，rtd，歐姆，電壓或磨電壓類型-所有這些都可以使用過程控制設(shè)計器配置工具輕松分配。高點對點電隔離簡化了安裝，節(jié)省了外部隔離硬件的費(fèi)用
?16點高電平模擬輸入模塊:每個點可配置為V或mA。電隔離點到底盤。點對點電隔離(第12頁)。每個通道可添加250歐姆的分流電阻。
?4點電隔離模擬輸出模塊。電隔離點到底盤支撐，每個從0到20ma
數(shù)據(jù)緩中:由于i/0設(shè)備的速率較低而CPU和內(nèi)存的速率卻很高，故在控制器中必須設(shè)置一緩沖器。在輸出時，用此緩沖器暫存由主機(jī)高速傳來的數(shù)據(jù)，然后才以I/0設(shè)備所具有的速率將緩沖器中的數(shù)據(jù)傳送給|/0設(shè)備;在輸入時，緩沖器則用于暫存從!/0設(shè)備送來的數(shù)據(jù)，待接收到一批數(shù)據(jù)后，再將緩沖器中的數(shù)據(jù)高速地傳送給主機(jī)。
差錯控制:設(shè)備控制器還兼管對由I/O設(shè)備傳送來的數(shù)據(jù)進(jìn)行差錯檢測。若發(fā)現(xiàn)傳送中出現(xiàn)了錯誤，通常是將差錯檢測碼置位，并向 CPU報告，于是CPU將本次傳送來的數(shù)據(jù)作廢，并重新進(jìn)行一次傳送。這樣便可保證數(shù)據(jù)輸入的正確性。數(shù)據(jù)交換:這是指實現(xiàn)CPU與控制器之間、控制器與設(shè)備之間的數(shù)據(jù)交換。對于前者，是通過數(shù)據(jù)總線，由CPU并行地把數(shù)據(jù)寫入控制器，或從控制器中并行地讀出數(shù)據(jù);對于后者，是設(shè)備將數(shù)據(jù)輸入到控制器，或從控制器傳送給設(shè)備。為此，在控制器中須設(shè)置數(shù)據(jù)寄存器。狀態(tài)說明:標(biāo)識和報告設(shè)備的狀態(tài)控制器應(yīng)記下設(shè)備的狀態(tài)供CPU了解。例如，僅當(dāng)該設(shè)備處于發(fā)送就緒狀態(tài)時，CPU才能啟動控制器從設(shè)備中讀出數(shù)據(jù)。為此，在控制器中應(yīng)設(shè)置一狀態(tài)寄存器，用其中的每一位來反映設(shè)備的某一種狀態(tài)，當(dāng)CPU將該奇存器的內(nèi)容讀入后，便可了解該設(shè)備的狀態(tài)。

900A16-0001

900A16-0001
The following I/O modules can be used to create customizations
Control solutions.
? 16-channel universal IO module Galaxy isolated input/output to chassis (p.29)
? 8-point universal analog input modules: electrically isolated point-to-case inputs can be mixed on the module and may include multiple thermocouple types, rtd, ohm, voltage, or grinding voltage types – all of which can be easily assigned using the process Control Designer configuration tool. High point to point electrical isolation simplifies installation and saves on the cost of external isolation hardware (page 8).
? 16-point high level analog input module: Each point can be configured as V or mA. Electrical isolation point to chassis. Point-to-point electrical isolation (page 12). 250 ohms of shunt resistance can be added per channel.
? 4-point electrical isolation analog output module. Electrical isolation points to chassis supports, each from 0 to 20ma
Slow data: Since the speed of the 1/0 device is low and the CPU and memory speed is high, a buffer must be set in the controller. At output, the buffer is used to temporarily store the data coming from the host at high speed, and then the data in the buffer is transmitted to the |/0 device at the rate that the I/0 device has. On input, the buffer is used to temporarily store the slave! The data sent by the /0 device, after receiving a batch of data, the data in the buffer is transmitted to the host at high speed.
Error control: The device controller is also responsible for error detection of the data transmitted by the I/O device. If an error is found in the transmission, the error detection code is usually set and reported to the CPU, so the CPU will cancel the data sent this time and retry the transmission. This ensures the correctness of data input. Data exchange: This refers to the realization of data exchange between the CPU and the controller, and between the controller and the device. For the former, through the data bus, the CPU writes the data to the controller in parallel, or reads the data from the controller in parallel; In the latter case, the device inputs data to the controller, or from the controller to the device. For this purpose, a data register must be set up in the controller. Status description: Identifying and reporting the status of the device The controller records the status of the device for the CPU to understand. For example, the CPU can start the controller to read data from the device only when the device is in the send-ready state. To this end, a status register should be set up in the controller, and each bit of it reflects a certain state of the device. When the CPU reads the content of the memory, it can understand the state of the device.

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